Technology Scaling Eeects on Multipliers

نویسندگان

  • Hesham Al-Twaijry
  • Michael J. Flynn
چکیده

Since integrated circuits were invented, fabrication engineers have been able to steadily decrease the dimensions of the devices (transistors). These reductions in the minimum feature sizes have resulted in improved performance. In addition, the dimensions of the interconnect used to connect the active transistors have also scaled. The decreasing dimensions of the physical devices causes the capacitance and resistances of the diierent parts of the multiplier to change. Therefore the relative delay due to each part of the multiplier changes. In addition the diierent encoding schemes used to generate the partial products and the diierent topologies used in the reduction of the partial products eeect the total latency of the multiplier. This paper examines the eeects of the smaller device dimensions on multipliers. It will show that interconnect is becoming more important and that generating the partial products using an procedure provides the minimum latency for small feature sizes.

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تاریخ انتشار 1996